1. Field of the Invention
The present invention relates to the field of fabrication of integrated circuits, and, more particularly, to a semiconductor structure and a method for determining critical dimensions and an overlay error caused during the formation of two subsequent material layers.
2. Description of the Related Art
Fabrication of integrated circuits requires tiny regions of precisely controlled size to be formed in a material layer of an appropriate substrate, such as a silicon substrate. These tiny regions of precisely controlled size are generated by treating the material layer by means of, for example, ion implantation or etching, wherein a mask layer is formed over the material layer to be treated to define these tiny regions. In general, a mask layer may consist of or is formed by means of a layer of photoresist that is patterned by a lithographic process. During the lithographic process, the resist may be spin coated onto the wafer substrate, and is then selectively exposed to ultraviolet radiation. After developing the photoresist, depending on the type of resist, positive resist or negative resist, the exposed portions or the non-exposed portions are removed to form the required pattern in the photoresist layer. Since the dimensions of the patterns in modern integrated circuits are steadily decreasing, the equipment used for patterning device features have to meet very stringent requirements with regard to resolution of the involved fabrication processes. In this respect, resolution is considered as a measure specifying the consistent ability to print minimum-size images under conditions of predefined manufacturing variations. One dominant factor in improving the resolution is represented by the lithographic process, in which patterns contained in a photo mask or reticle are optically transferred to the substrate via an optical imaging system. Therefore, great efforts are made to steadily improve optical properties of the lithographic system, such as numerical aperture, depth of focus, and wavelength of the light source used.
The quality of the lithographic imagery is extremely important in creating very small feature sizes. Of comparable importance is, however, the accuracy with which an image can be positioned on the surface of the substrate. Integrated circuits are fabricated by sequentially patterning material layers, wherein features on successive material layers bear a spatial relationship to one another. Each pattern formed in a subsequent material layer has to be aligned to a corresponding pattern formed in the previous material layer within specified registration tolerances. These registration tolerances are caused by, for example, a variation of a photoresist image on the substrate due to non-uniformities in such parameters as resist thickness, baking temperature, exposure and development. Furthermore, non-uniformities in the etching processes can lead to variations of the etched features. In addition, there exists an uncertainty in overlaying the image of the pattern for the current material layer to the etched pattern of the previous material layer, while photolithographically transferring the image onto the substrate. Several factors contribute to the inability of the imagery system to perfectly overlay two layers, such as imperfections within a set of masks, temperature differences between times of exposure, and a limited registration capability of the alignment tool. As a result, the dominant criteria determining the minimum feature size finally obtained are resolution for creating features in individual substrate levels and the total overlay error to which the above-explained factors, in particular the lithographic processes, contribute.
Accordingly, it is essential to steadily monitor the resolution, i.e., the capability of reliably and reproducibly creating the minimum feature size, also referred to as critical dimension (CD), within a specific material layer, and to steadily determine the overlay accuracy of patterns of two subsequently formed material layers. Recently, scatterometry has become a powerful tool in characterizing a periodic pattern of features with a size in the range of 1 xcexcm to 0.1 xcexcm. In the scatterometry analysis, the substrate containing a periodic structure is illuminated with radiation of an appropriate wavelength range and the diffracted light is detected. Many types of apparatus may be used for illumination and detecting of the diffracted light beam. U.S. Pat. No. 5,867,276 describes a so-called two-xcex8 scatterometer wherein the angle of incidence of a light beam is continuously varied by synchronously rotating the sample and the detector. Furthermore, this document describes a lens scatterometer system utilizing a rotating block to translate a light beam emitted from a light source to different points of the entrance aperture of a lens to illuminate the substrate at different angles of incidence. Moreover, this document describes a scatterometer with a fixed angle of incidence that utilizes a multi-wavelength illumination source to obtain the required information from the diffracted multi-wavelength beam. From this information contained in the measurement spectrum, the optical and dimensional properties of the individual elements that form the periodic structure and thickness of underlying films can be extracted, for example, by statistical techniques. The sample parameters of interest may include the width of lines, if the periodic pattern contains lines and spaces, their sidewall angle, and other structural details. In case of a more complex periodic structure having, for example, a two-dimensional periodicity, the parameters may include dimensional properties such as hole diameter or depth. It should be noted that in the present application the term xe2x80x9cscatterometerxe2x80x9d also includes devices emitting a substantially linearly polarized light beam such as an ellipsometer, to obtain structural information with respect to changes in the polarization state by detecting and analyzing the beam scattered from the periodic structure.
Although a scatterometer provides a powerful tool for a non-destructive and swift method for determining the quality of periodic structures formed in a material layer in conformity with semi-conductor fabrication processes, it is desirable to also determine the overlay accuracy by means of scatterometry.
According to one aspect of the present invention, a semiconductor structure for metrology of critical dimensions and overlay accuracy comprises a substrate having a surface defined by an X direction and a Y direction. Moreover, the semiconductor structure comprises a first periodic pattern formed on the substrate and having a first X periodicity along the X direction and a first Y periodicity along the Y direction. Additionally, the semiconductor structure comprises a second periodic pattern formed on the substrate and having a second X periodicity along the X direction and a second Y periodicity along the Y direction, wherein the first periodic pattern and the second periodic pattern overlap with each other and define an X overlap region indicating an overlay error in the X direction, and a Y overlap region indicating an overlay error in the Y direction.
According to another aspect of the present invention, a semiconductor structure for metrology of critical dimensions and overlay accuracy comprises a substrate having a surface defined by an X direction and a Y direction, and a two-dimensional periodic structure including a plurality of elementary cells. Moreover, each elementary cell comprises a first region and a second region, defining a first edge extending along the X direction and a second edge extending along the Y direction. Furthermore, the elementary cell comprises a third region formed in spaced relationship to the first and second regions and the third region defines a Y overlap region with the first and second region at the first edge and an X overlap region with the first and second regions at the second edge, wherein the X overlap region and the Y overlap region differ from each other in one of shape, total area, diffracting characteristics and optical characteristics.
According to yet another aspect of the present invention, a semiconductor structure for metrology of critical dimensions and overlay accuracy comprises a substrate having a surface defined by an X direction and a Y direction, a first periodic pattern formed on the substrate and a second periodic pattern formed on the substrate. The first and second periodic patterns overlap with each other and define a composed 2-dimensional diffraction pattern defined by a pitch DX along the X direction and a pitch DY along the Y direction, wherein DX and DY are determined by the relative position of the first and second periodic patterns.
According to still another aspect of the present invention, a method of determining an overlay error caused during formation of a semiconductor structure is provided. The method comprises providing the semiconductor structure that includes a substrate defining a first and a second direction and a first two-dimensional periodic pattern formed by a first lithographic process and a second two-dimensional periodic pattern formed by a second lithographic process, wherein the relative position of the first and second patterns to each other indicates an overlay error with respect to the first and second directions, respectively. Moreover, the method comprises directing a light beam onto the first and second two-dimensional periodic patterns, and detecting a light beam diffracted by the first and second two-dimensional periodic patterns to generate a measurement spectrum. In addition, the method comprises comparing the measurement spectrum with reference data, wherein the reference data represents information for a predefined overlay error of the first and second periodic patterns with respect to the first and second directions.